// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2022 Forlinx Co., Ltd.
 *

 * rkisp0 --> rkisp0_vir0/rkisp0_vir1/rkisp0_vir2/rkisp0_vir3
 * rkisp1 --> rkisp1_vir0/rkisp1_vir1/rkisp1_vir2/rkisp1_vir3

 * rkcif_mipi_lvds --> rkcif_mipi_lvds[0-4]_sditf

 * mipicamera0 --> csi2_dcphy0 --> mipi0_csi2 -->rkcif_mipi_lvds  --> rkcif_mipi_lvds_sditf  --> rkisp0_vir0
 * mipicamera1 --> csi2_dcphy1 --> mipi1_csi2 -->rkcif_mipi_lvds1 --> rkcif_mipi_lvds1_sditf --> rkisp0_vir1
	
 * csi2_dphy0 or (csi2_dphy1、csi2_dphy2)	dphy0
 * csi2_dphy3 or (csi2_dphy4、csi2_dphy5)	dphy1

 * mipicamera2 --> csi2_dphy1 -->  mipi2_csi2 -->rkcif_mipi_lvds2 -->rkcif_mipi_lvds2_sditf  --> rkisp0_vir2
 * mipicamera3 --> csi2_dphy2 -->  mipi3_csi2 -->rkcif_mipi_lvds3 -->rkcif_mipi_lvds3_sditf  --> rkisp1_vir0
 * mipicamera4 --> csi2_dphy4 -->  mipi4_csi2 -->rkcif_mipi_lvds4 -->rkcif_mipi_lvds4_sditf  --> rkisp1_vir1
 * mipicamera5 --> csi2_dphy5 -->  mipi5_csi2 -->rkcif_mipi_lvds5 -->rkcif_mipi_lvds5_sditf  --> rkisp1_vir2

 * mipicamera6 --> rkcif_dvp ---> rkcif_dvp_sditf
 */

/ {
    ext_cam_clk: external-camera-clock {
        compatible = "fixed-clock";
        clock-frequency = <24000000>;
        clock-output-names = "CLK_CAMERA_24MHZ";
        #clock-cells = <0>;
    };
};

&rkcif {
    status = "okay";
};

&rkcif_mmu {
    status = "okay";
};


//************************************************
//***  CAM3 OV5645 Configuration Description  ****
//************************************************

&csi2_dphy0_hw {
    status = "okay";
};

&i2c7 {
    status = "okay";
    clock-frequency = <400000>;//400K

    cam3_ar0234m_3b: cam3_ar0234m@3b {
        compatible = "veye,mvcam";
        status = "okay";
        reg = <0x3b>;

        clocks = <&ext_cam_clk>;
        clock-names = "xclk";
        clock-frequency = <24000000>;//24M

        pwdn-gpios = <&extio EXTIO_GPIO_P05 GPIO_ACTIVE_HIGH>;//high leavel  value
        reset-gpios = <&extio EXTIO_GPIO_P04 GPIO_ACTIVE_HIGH>;
        rockchip,camera-module-index = <0>;
        rockchip,camera-module-facing = "back";
        rockchip,camera-module-name = "NC";
        rockchip,camera-module-lens-name = "NC";
        port {
            cam3_ar0234m_3b_out: endpoint {
                remote-endpoint = <&mipi_in_ucam3_3b>;
                data-lanes = <1 2>;
            };
        };
    };

};



&csi2_dphy1 {
    status = "okay";
    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        port@0 {
            reg = <0>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi_in_ucam3_3b: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&cam3_ar0234m_3b_out>;
                data-lanes = <1 2>;
            };
        };
        port@1 {
            reg = <1>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi2_csi2_mipicsi0_out0: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&mipi2_csi2_input>;
            };
        };
    };
};


&mipi2_csi2 {
        status = "okay";
    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        port@0 {
            reg = <0>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi2_csi2_input: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&mipi2_csi2_mipicsi0_out0>;
            };
        };
        port@1 {
            reg = <1>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi2_csi2_output: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&cif_mipi_lvds2>;
            };
        };
    };
};

&rkcif_mipi_lvds2 {
    status = "okay";
    port {
        cif_mipi_lvds2: endpoint {
            remote-endpoint = <&mipi2_csi2_output>;
        };
    };
};

&rkcif_mipi_lvds2_sditf {
     status = "disabled";
    /*port {
        mipi_lvds2_sditf: endpoint {
            remote-endpoint = <&isp0_vir2>;
        };
    };*/
};
//&rkcif_mmu{
//    status ="okay";
//};

/*&rkisp0{
    status ="okay";
};

&isp0_mmu{
    status ="okay";
};


&rkisp0_vir2 {
    status = "okay";
    port {
        #address-cells = <1>;
        #size-cells = <0>;
        isp0_vir2: endpoint@0 {
            reg = <0>;
            remote-endpoint = <&mipi_lvds2_sditf>;
        };
    };
};*/

//************************************************
//***  CAM4 OV5645 Configuration Description  ****
//************************************************

/*&csi2_dphy1_hw {
    status = "okay";
};

&i2c3 {
    status = "okay";
    clock-frequency = <400000>;//400K

    cam4_ar0234m_3b: cam4_ar0234m@3b {
        compatible = "veye,mvcam";
        status = "okay";
        reg = <0x3b>;

        clocks = <&ext_cam_clk>;
        clock-names = "xclk";
        clock-frequency = <24000000>;//24M

        pwdn-gpios = <&extio EXTIO_GPIO_P07 GPIO_ACTIVE_HIGH>;//high leavel  value
        reset-gpios = <&extio EXTIO_GPIO_P06 GPIO_ACTIVE_HIGH>;
        rockchip,camera-module-index = <4>;
        rockchip,camera-module-facing = "back";
        rockchip,camera-module-name = "NC";
        rockchip,camera-module-lens-name = "NC";
        port {
            cam4_ar0234m_3b_out: endpoint {
                remote-endpoint = <&mipi_in_ucam4_3b>;
                data-lanes = <1 2>;
            };
        };
    };
};
	

&csi2_dphy4 {
    status = "okay";
    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        port@0 {
            reg = <0>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi_in_ucam4_3b: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&cam4_ar0234m_3b_out>;
                data-lanes = <1 2>;
            };
        };
        port@1 {
            reg = <1>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi4_csi2_csidphy1_out0: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&mipi4_csi2_input>;
            };
        };
    };
};


&mipi4_csi2 {
    status = "okay";
    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        port@0 {
            reg = <0>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi4_csi2_input: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&mipi4_csi2_csidphy1_out0>;
            };
        };
        port@1 {
            reg = <1>;
            #address-cells = <1>;
            #size-cells = <0>;
            mipi4_csi2_output: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&cif_mipi_in4>;
            };
        };
    };
};

&rkcif_mipi_lvds4 {
    status = "okay";
    port {
        cif_mipi_in4: endpoint {
            remote-endpoint = <&mipi4_csi2_output>;
        };
    };
};

&rkcif_mipi_lvds4_sditf {
    status = "okay";
    port {
        mipi_lvds4_sditf: endpoint {
            remote-endpoint = <&isp1_vir1>;
        };
    };
};

&rkisp1{
    status ="okay";
};
&isp1_mmu{
    status ="okay";
};
&rkisp1_vir1 {
    status = "okay";
    port {
        #address-cells = <1>;
        #size-cells = <0>;
        isp1_vir1: endpoint@0 {
            reg = <0>;
            remote-endpoint = <&mipi_lvds4_sditf>;
        };
    };
};

*/